Simplify Output RegistersĪll the various types of output registers have been collapsed into twelve output registers: 1 for position, 2 for color, 8 for texture, and 1 for fog or point size. Shader validation does not enforce this restriction. Attempting to index across non-contiguous registers will produce undefined results. While this restriction may be inconvenient, it permits hardware optimization to take place. You are only allowed to index a continuous range of registers that is, you cannot index across registers that have not been declared. In fact, if indexing is used the position and psize semantics have to be declared in the o0 and o1 registers respectively. However, you may not index any output register that has been declared with a position or point size semantic.
You must declare input and output registers before indexing them. Index Any RegisterĪll registers( Input Register and Output Registers) can be indexed using Loop Counter Register (only constant registers could be indexed in earlier versions.) The 3_0 vertex shader model (vs_3_0) expands on the features of vs_2_0 with more powerful register indexing, a set of simplified output registers, the ability to sample a texture in a vertex shader, and the ability to control the rate at which shader inputs are initialized. Each register that is used needs to be declared using the dcl instruction and a semantic (for example, dcl_color0 o0.xyzw). The vertex shader output register types have been collapsed into twelve registers (see Output Registers).
#SHADER MODEL 3.0 WINDOWS XP DRIVERS#
These changes make it possible to simplify drivers and the runtime. If you are implementing shaders in hardware, you may not use vs_3_0 or ps_3_0 with any other shader versions, and you may not use either shader type with the fixed function pipeline. Vertex shaders and pixel shaders are simplified considerably from earlier shader versions.
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